IA-32 (short for "Intel Architecture, 32-bit", sometimes also called i386) is the 32-bit version of the x86 instruction set architecture, designed by Intel and first implemented in the 80386 microprocessor in 1985. IA-32 is the first incarnation of x86 that supports 32-bit computing; as a result, the "IA-32" term may be used as a metonym to refer to all x86 versions that support 32-bit computing.
Within various programming language directives, IA-32 is still sometimes referred to as the "i386" architecture. In some other contexts, certain iterations of the IA-32 ISA are sometimes labelled i486, i586 and i686, referring to the instruction supersets offered by the 80486, the P5 and the P6 microarchitectures respectively. These updates offered numerous additions alongside the base IA-32 set, i.e. floating-point capabilities and the MMX extensions.
Intel was historically the largest manufacturer of IA-32 processors, with the second biggest supplier having been AMD. During the 1990s, VIA, Transmeta and other chip manufacturers also produced IA-32 compatible processors (e.g. WinChip). In the modern era, Intel still produces IA-32 processors under the Intel Quark microcontroller platform; however, since the 2000s, the majority of manufacturers (Intel included) moved almost exclusively to implementing CPUs based on the 64-bit variant of x86, x86-64. x86-64, by specification, offers legacy operating modes that operate on the IA-32 ISA for backwards compatibility. Even given the contemporary prevalence of x86-64, as of 2018, IA-32 protected mode versions of many modern operating systems are still maintained, e.g. Microsoft Windows and the Debian GNU/Linux distribution. In spite of IA-32's name (and causing some potential confusion), the 64-bit evolution of x86 that originated out of AMD would not be known as "IA-64", that name instead belonging to Intel's Itanium architecture.
The primary defining characteristic of IA-32 is the availability of 32-bit general-purpose processor registers (for example, EAX and EBX), 32-bit integer arithmetic and logical operations, 32-bit offsets within a segment in protected mode, and the translation of segmented addresses to 32-bit linear addresses. The designers took the opportunity to make other improvements as well. Some of the most significant changes are described below.
|Operating mode||Operating system required||Type of code being run||Default address size||Default operand size||Typical GPR width|
|Protected mode||32-bit operating system or boot loader||32-bit protected-mode code||32 bits||32 bits||32 bits|
|16-bit protected-mode operating system or boot loader, or 32-bit boot loader||16-bit protected-mode code||16 bits||16 bits||16 or 32 bits|
|Virtual 8086 mode||16- or 32-bit protected-mode operating system||16-bit real-mode code||16 bits||16 bits||16 or 32 bits|
|Real mode||16-bit real-mode operating system or boot loader, or 32-bit boot loader||16-bit real-mode code||16 bits||16 bits||16 or 32 bits|
|Unreal mode||16-bit real-mode operating system or boot loader, or 32-bit boot loader||16-bit real-mode code||32 bits||16 bits||16 or 32 bits|
Thin Universal binaries to the specified architecture [...] should be specified as "i386", "x86_64", etc.[dead link]
The Intel386 processor was the first 32-bit processor in the IA-32 architecture family. It introduced 32-bit registers for use both to hold operands and for addressing.